Title :
Challenges and limitations of NAND flash memory devices based on floating gates
Author :
Park, Byoungjun ; Cho, Sunghoon ; Park, Milim ; Park, Sukkwang ; Lee, Yunbong ; Cho, Myoung Kwan ; Ahn, Kun-Ok ; Bae, Gihyun ; Park, Sungwook
Author_Institution :
Flash Dev. Div., Hynix Semicond. Inc., Cheongju, South Korea
Abstract :
In this paper, the limitations and challenges of NAND flash memory devices based on floating gates are discussed. And, the newly adopted operation algorithms, such as intelligent incremental step pulse erase, various biasing in grouped W/Ls, virtual negative read and data randomization, and their results are exhibited.
Keywords :
NAND circuits; flash memories; NAND flash memory device; data randomization; floating gates; intelligent incremental step pulse erase; operation algorithm; virtual negative read; Computer architecture; Flash memory; Interference; Logic gates; Microprocessors; Nonvolatile memory; Reliability;
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul
Print_ISBN :
978-1-4673-0218-0
DOI :
10.1109/ISCAS.2012.6272053
