DocumentCode :
302508
Title :
A pulsed VLSI radial basis function chip
Author :
Mayes, D.J. ; Hamilton, A. ; Murray, A.F. ; Reekie, H.M.
Author_Institution :
Dept. of Electr. Eng., Edinburgh Univ., UK
Volume :
3
fYear :
1996
fDate :
12-15 May 1996
Firstpage :
297
Abstract :
This paper presents the circuits in, and operation of, the PAR chip. PAR, the Pulsed Analogue RBF chip, has been designed to implement a complete Radial Basis Function (RBF) Neural Network on a single chip using proven pulsed circuits
Keywords :
VLSI; analogue integrated circuits; neural chips; pulse circuits; PAR chip; neural network; pulsed VLSI radial basis function chip; pulsed analogue RBF chip; Application software; Circuit testing; Euclidean distance; Hardware; Neural networks; Nonlinear equations; Pulse circuits; Pulse width modulation; Space vector pulse width modulation; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-3073-0
Type :
conf
DOI :
10.1109/ISCAS.1996.541592
Filename :
541592
Link To Document :
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