A GIDL free tunneling gate driver for a low power non-volatile memory array

Author

Dagan, Hadar ; Teman, Adam ; Fish, Alexander ; Pikhay, Evgeny ; Dayan, Vladislav ; Roizin, Y.

Author_Institution

Low Power Circuits & Syst. Lab. (LPC&S), Ben-Gurion Univ. of the Negev, Beer-Sheva, Israel

fYear

2012

fDate

20-23 May 2012

Firstpage

452

Lastpage

455

Abstract

A recently presented single-poly non-volatile C-Flash memory bitcell provides an ultra-low power low cost option for embedded RFID design. This cell requires the application of a 10V potential difference between the cell´s control lines for program and erase operations. Providing the required voltages includes several challenges in the design of the voltage driver, such as the elimination of Gate Induced Drain Leakage (GIDL) currents. In this paper, we present a voltage driver architecture that utilizes novel techniques to overcome the power consumption problems during high voltage propagation. This driver was implemented in the TowerJazz 0.18μm CMOS technology, providing the required functionality with a low static-power figure of 34.6pW.

Keywords

CMOS integrated circuits; driver circuits; flash memories; leakage currents; low-power electronics; radiofrequency identification; random-access storage; GIDL free tunneling gate driver; TowerJazz CMOS technology; cell control lines; embedded RFID design; erase operations; gate induced drain leakage current elimination; low power nonvolatile memory array; power consumption problems; program operations; single-poly nonvolatile C-flash memory bitcell; size 0.18 mum; ultra-low power low cost option; voltage driver; voltage propagation; Arrays; Logic gates; Microprocessors; Nonvolatile memory; Standards; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2012 IEEE International Symposium on

Conference_Location

Seoul

ISSN

0271-4302

Print_ISBN

978-1-4673-0218-0

Type

conf

DOI

10.1109/ISCAS.2012.6272062

Filename

6272062