DocumentCode
3025629
Title
An FPGA based co-processor for GLCM texture features measurement
Author
Tahir, M.A. ; Roula, M.A. ; Bouridane, A. ; Kurugollu, F. ; Amira, A.
Author_Institution
Sch. of Comput. Sci., Queen´´s Univ., Belfast, UK
Volume
3
fYear
2003
fDate
14-17 Dec. 2003
Firstpage
1006
Abstract
Gray Level Co-occurrence Matrix (GLCM), one of the best known texture analysis methods, estimates image properties related to second-order statistics. These image properties commonly known as texture features can be used for image classification, image segmentation, and remote sensing applications. In this paper, we present an FPGA based co-processor to accelerate the extraction of texture features from GLCM. Handel-C, a recently developed C-like programming language for hardware design, has been used for the FPGA implementation of GLCM texture features measurement. Results show that the FPGA has better speed performances when compared to a general purpose processor for the extraction of GLCM features.
Keywords
coprocessors; field programmable gate arrays; hardware-software codesign; image classification; image processing equipment; image segmentation; image texture; reconfigurable architectures; FPGA based coprocessor; FPGA implementation; Handel-C; gray level cooccurrence matrix; hardware design; high level language; image classification; image properties; image segmentation; reconfigurable computing; remote sensing; second-order statistics; texture analysis; Acceleration; Coprocessors; Feature extraction; Field programmable gate arrays; Image analysis; Image classification; Image segmentation; Image texture analysis; Remote sensing; Statistical analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference on
Print_ISBN
0-7803-8163-7
Type
conf
DOI
10.1109/ICECS.2003.1301679
Filename
1301679
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