• DocumentCode
    3025966
  • Title

    A formal approach to slack-driven high-level synthesis

  • Author

    Yeh, Hua-Hsin ; Huang, Shih-Hsu ; Cheng, Chun-Hua

  • Author_Institution
    Dept. of Electron. Eng., Chung Yuan Christian Univ., Chungli, Taiwan
  • fYear
    2012
  • fDate
    20-23 May 2012
  • Firstpage
    584
  • Lastpage
    587
  • Abstract
    With the advent of deep sub micron era, design closure is becoming harder to achieve. In high-level synthesis, slack is a very effective means of tolerating uncertainties. Thus, several research efforts have been paid to study the slack-driven high-level synthesis problem. However, previous works cannot actually maximize the total slack value, because they are limited to either the operation scheduling stage or the resource binding stage. In this paper, we study the simultaneous operation scheduling and resource binding for the maximization of the total slack value. An integer linear programming approach is proposed for formally draw up the slack-driven high-level synthesis problem. Note that our approach guarantees maximizing the total slack value. Compared with the combination of previous works (i.e., slack-driven operation scheduling followed by slack-driven resource binding), experimental data show that our approach can greatly reduce the total slack value without any design overhead.
  • Keywords
    CMOS integrated circuits; high level synthesis; integer programming; linear programming; deep sub micron era; design closure; integer linear programming; resource binding; simultaneous operation scheduling; slack-driven high-level synthesis; Adders; Clocks; Delay; Design automation; Flow graphs; Scheduling; Uncertainty;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
  • Conference_Location
    Seoul
  • ISSN
    0271-4302
  • Print_ISBN
    978-1-4673-0218-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.2012.6272098
  • Filename
    6272098