A three-stage power amplifier for WiMedia Ultra-Wideband applications

A three-stage 0.18μm CMOS power amplifier (PA) targeted for 3.1 to 4.8 GHz WiMedia Ultra-Wideband (UWB) system is discussed in this paper. The first and the last stage of the proposed PA are the conventional common source (CS) inductive degeneration while the inter-stage is a common gate (CG) structure with LC matching components. With careful optimization, the inter-stage CG and LC matching components enhances the gain of the amplifier over a wideband range while maintaining a reasonable output power of the proposed PA. Offchip LC components are used to improve the overall input and output return losses of the proposed PA. The proposed PA has a simulated maximum power gain of 19.3 dB, minimum input return loss of 19.7 dB, maximum output return loss of 8.5 dB, reverse isolation of at least 36 dB, maximum output 1 dB gain compression of 10 dBm and power efficiency of more than 30 %, while dissipating a DC power of 20 mW from a 1.5 V supply. Simulation results gathered in this work can serve as a guideline for wideband PAs design, especially in radio frequency (RF) transmitter for mobile devices and consumer products.