• DocumentCode
    3026445
  • Title

    Development of capacity indices for semiconductor fabrication

  • Author

    Chik, M.A. ; Ibrahim, Khalil ; Saidin, M.H. ; Yusof, F.M. ; Devandran, G. ; Hashim, U.

  • Author_Institution
    Silterra Malaysia Sdn. Bhd, Kulim, Malaysia
  • fYear
    2012
  • fDate
    19-21 Sept. 2012
  • Firstpage
    649
  • Lastpage
    653
  • Abstract
    A typical semiconductor fabrication process contains 300 to 1000 steps and its variation depends on the product complexity. Most of the processes are re-entrance to same equipments especially at photolithography, etching, implanter, film deposition, chemical mechanical polishing (CMP) and cleaning. For example, photolithography steps for island, poly, and contact module will be processed at same equipment. Another complication is that the equipment types are different from one to another resulting in different approach for cycle time calculation, difference in availability and efficiency. The objective of this paper is to establish capacity indices to guide for monthly output in semiconductor fabrication facilities. The approach in this paper is using the waterfall chart for individual process and equipment types. Data extraction is being done through reporting systems of Advance Productivity Family (APF), an industrial standard software for data collection that is integrated with individual equipment and product processing historical data. The data was then analyzed using JMP to check for sanity. Results were used to develop capacity indices, which are wafer per hour (wph), manufacturing efficiency, and equipment availability. All these information will be later used to develop the final capacity figure. The final capacity number will then be used to guide the planning team to schedule product combination that will achieve monthly and quarterly wafer shipment goal to customers. This approach reached accuracy of 99% compared to actual throughput. In conclusion, this approach helps the company to provide planning guidelines in meeting the financial goals.
  • Keywords
    chemical mechanical polishing; etching; photolithography; semiconductor devices; APF; CMP; JMP; advance productivity family; capacity indices; chemical mechanical polishing; cleaning; contact module; cycle time calculation; data extraction; equipment availability; equipment types; etching; film deposition; financial goals; implanter; industrial standard software; manufacturing efficiency; photolithography; planning guidelines; product processing historical data; reporting systems; semiconductor fabrication process; wafer per hour; waterfall chart; Availability; Companies; Fabrication; Foundries; Lithography; Software; Advance Productivity Family (APF); Chemical mechanical polishing (CMP); Work In progress (WIP); wafer per hour (wph);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Electronics (ICSE), 2012 10th IEEE International Conference on
  • Conference_Location
    Kuala Lumpur
  • Print_ISBN
    978-1-4673-2395-6
  • Electronic_ISBN
    978-1-4673-2394-9
  • Type

    conf

  • DOI
    10.1109/SMElec.2012.6417228
  • Filename
    6417228