A Manchester code generator running at 1 GHz

Author

Benabes, P. ; Gauthier, A. ; Oksman, J.

Author_Institution

Service des Mesures, Supelec, Gif sur Yvette, France

Volume

3

fYear

2003

fDate

14-17 Dec. 2003

Firstpage

1156

Abstract

A new Manchester code generator designed at transistor level is presented in this paper. This generator uses 32 transistors and has the same complexity as a standard D flip-flop. It is intended to be used in a complex optical communication system. The main benefit of this design is to use a clock signal running at the same frequency as the data. Output changes on the rising edge and falling edge of the clock. Simulations results show a correct behavior up to 1 Gbit/s data rate with a 0.35 μ CMOS technology within a commercial temperature range.

Keywords

CMOS logic circuits; cellular arrays; circuit simulation; flip-flops; logic gates; modulation coding; time-domain analysis; 1 GHz; CMOS technology; Manchester code generator; Spectre simulation; clock falling edge; clock rising edge; complex optical communication system; edge-triggered D flip-flop; gated inverters; modulation codes; noninverting latch; standard cell; time domain simulations; transfer gates; transistor level; Bandwidth; CMOS technology; Clocks; Flip-flops; Frequency; Inverters; LAN interconnection; Optical fiber networks; Optical interconnections; Signal design;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference on

Print_ISBN

0-7803-8163-7

Type

conf

DOI

10.1109/ICECS.2003.1301717

Filename

1301717