Title :
A model-first design and verification flow for analog-digital convergence systems: A high-speed receiver example in digital TVs
Author :
Kim, Jaeha ; Ryu, Sigang ; Yoo, Byoungjoo ; Kim, Hanseok ; Choi, Yunju ; Jeong, Deog-Kyoon
Author_Institution :
Seoul Nat. Univ., Seoul, South Korea
Abstract :
A model-first flow is demonstrated for designing and validating a high-speed serial receiver in a digital TV. Starting with a functional model of the top-level mixed-signal system rather than with transistor-level designs helps detect problems due to the increasing interaction between the analog and digital circuits. Once the functionality of the system model is verified, the model can be leveraged as the specification for generating and validating the circuit and physical implementations of the system, automating a large portion of the design process.
Keywords :
digital circuits; digital television; integrated circuit design; mixed analogue-digital integrated circuits; receivers; analog circuit; analog-digital convergence system; design process; digital TV; digital circuit; high-speed receiver; high-speed serial receiver; model-first design; model-first flow; top-level mixed-signal system; verification flow; Calibration; Clocks; Feedback loop; Hardware design languages; Integrated circuit modeling; Receivers; Timing;
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul
Print_ISBN :
978-1-4673-0218-0
DOI :
10.1109/ISCAS.2012.6272147
