Title :
Delay and power expressions for a CMOS inverter driving a resistive-capacitive load
Author :
Adler, Victor ; Friedman, Eby G.
Author_Institution :
Dept. of Electr. Eng., Rochester Univ., NY, USA
Abstract :
A delay and power model of a CMOS inverter driving a resistive-capacitive load is presented. The model is derived from Sakurai´s alpha power law and exhibits good accuracy. The model can be used to design and analyze those inverters that drive a large RC load when considering both speed and power. Expressions are provided for estimating the propagation delay, transition time, and short circuit power dissipation for a CMOS inverter driving resistive-capacitive interconnect lines
Keywords :
CMOS logic circuits; RC circuits; delays; integrated circuit interconnections; integrated circuit modelling; logic gates; CMOS inverter; alpha power law; interconnect line; model; propagation delay; resistive-capacitive load; short circuit power dissipation; transition time; CMOS integrated circuits; CMOS logic circuits; Capacitance; Degradation; Delay estimation; Impedance; Integrated circuit interconnections; Inverters; Propagation delay; Semiconductor device modeling;
Conference_Titel :
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location :
Atlanta, GA
Print_ISBN :
0-7803-3073-0
DOI :
10.1109/ISCAS.1996.541910
