Analog vs. digital: a comparison of circuit implementations for low-power matched filters

The matched filter or correlator block of a spread-spectrum communication system occupies a place in the receiver that just follows the analog RF-to-baseband or RF-to-IF downconversion circuitry and just precedes the digital data-decoding circuitry. A matched filter may, therefore, be implemented via either digital or analog circuit techniques. This paper analyzes and compares a digital and an analog implementation of a programmable parallel matched filter using power efficiency-as a function of signal integrity, filter size, operating frequency, and technology scaling-as the primary metric of comparison. A methodology is presented and results are given that indicate wherein the multidimensional design space the digital circuit is more power-efficient than the analog one, and vice versa