A multiresolution algorithm for focal-plane compression

Author

Wang, Hsuan-Tsung ; Leon-Salas, Walter D.

Author_Institution

Comput. Sci. Electr. Eng. Dept., Univ. of Missouri, Kansas City, MO, USA

fYear

2012

fDate

20-23 May 2012

Firstpage

926

Lastpage

929

Abstract

An image compression algorithm suitable for focal plane integration and its hardware implementation are presented. In this approach an image is progressively decomposed into images of lower resolution. The low resolution images are then used as the predictors of the higher resolution images. The prediction residuals are entropy encoded and compressed. This compression approach can provide lossless or lossy compression and the resulting bitstream is a fully embedded code. A switched-capacitor circuit is proposed to implement the required operations. A prototype has been implemented on a 0.5 μm CMOS process. Simulation and measurements results validating the proposed approach are reported.

Keywords

CMOS integrated circuits; data compression; image coding; image resolution; switched capacitor networks; CMOS process; embedded code; entropy compression; entropy encoding; focal plane integration; focal-plane compression; higher resolution images; image compression; image decomposition; lossless compression; lossy compression; low resolution images; multiresolution algorithm; switched-capacitor circuit; CMOS integrated circuits; Capacitors; Clocks; Entropy; Image coding; Image resolution; Predictive coding;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2012 IEEE International Symposium on

Conference_Location

Seoul

ISSN

0271-4302

Print_ISBN

978-1-4673-0218-0

Type

conf

DOI

10.1109/ISCAS.2012.6272195

Filename

6272195