DocumentCode
3027913
Title
Low Power Pseudoexhaustive Testing with Cellular Automata
Author
Krishna, K.S. ; Uday, B.P. ; Chattopadhyay, Santanu
Author_Institution
Dept. of Electron. & Electr. Commun. Eng., Indian Inst. of Technol., Kharagpur, India
fYear
2009
fDate
28-29 Dec. 2009
Firstpage
419
Lastpage
423
Abstract
Compared to exhaustive testing, pseudo exhaustive testing requires a smaller test size and lesser test time. Dynamic power dissipation accounts for the major share of power dissipation in CMOS circuits. The amount of heat dissipated limits the density of a chip. The test mode power has been proved to be more than the functional power dissipation. In this work, we propose a method to identify the seed Cellular Automata (CA) that dissipates the minimum energy, during test. It has been observed that for many circuits, the variation in energy consumption is upto 83.78% at the maximum (3.86% at the minimum), considering all CA configurations. The variation in peak energy consumption is upto a maximum of 50% ( 8.62% at the minimum) among all CA configurations.
Keywords
CMOS logic circuits; cellular automata; circuit testing; CMOS circuits; cellular automata; dynamic power dissipation; pseudoexhaustive testing; Automatic testing; Circuit testing; Counting circuits; Electrical fault detection; Electronic equipment testing; Energy consumption; Particle swarm optimization; Positron emission tomography; Power dissipation; Test pattern generators; Dynamic Power; Extended CA; Maximal Length CA; Particle Swarm Optimization; Pseudo exhaustive testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Advances in Computing, Control, & Telecommunication Technologies, 2009. ACT '09. International Conference on
Conference_Location
Trivandrum, Kerala
Print_ISBN
978-1-4244-5321-4
Electronic_ISBN
978-0-7695-3915-7
Type
conf
DOI
10.1109/ACT.2009.109
Filename
5376594
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