DocumentCode :
3027921
Title :
High performance prime field multiplication for GPU
Author :
Leboeuf, Karl ; Muscedere, Roberto ; Ahmadi, Majid
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Windsor, Windsor, ON, Canada
fYear :
2012
fDate :
20-23 May 2012
Firstpage :
93
Lastpage :
96
Abstract :
This paper presents a high performance algorithm for modular multiplication on a graphics processing unit (GPU) implemented in assembler. The proposed algorithm carries out finite field multiplication over the NIST prime fields of size 192, 224, 256 and 384 bits. Included is a detailed explanation of our algorithm, an instruction count analysis, and a comparison to recently published work; compared to the next fastest design, the proposed algorithm´s execution time is 27 to 71 times faster.
Keywords :
graphics processing units; GPU; NIST prime fields; finite field multiplication; graphics processing unit; high performance prime field multiplication; instruction count analysis; modular multiplication; Algorithm design and analysis; Elliptic curve cryptography; Graphics processing unit; Instruction sets; NIST; Random access memory; Registers; CUDA; Elliptic Curve Cryptography; Finite Field Multiplication; GPU; GPU Computing; NIST Fields; Prime Field Multiplication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul
ISSN :
0271-4302
Print_ISBN :
978-1-4673-0218-0
Type :
conf
DOI :
10.1109/ISCAS.2012.6272196
Filename :
6272196
Link To Document :
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