Title :
ASIC design using the high-level synthesis system CALLAS: a case study
Author :
Koster, M. ; Geiger, M. ; Duzy, P.
Author_Institution :
Siemens AG, Munich, Germany
Abstract :
The Siemens high-level synthesis system CALLAS was used to synthesize an ASIC for moving-object detection consisting of 3400 equivalent gates. The digital signal processing (DSP) problem was formulated on algorithmic level in the hardware description language DSDL as a three-page algorithm. Only a few days were needed from specification to the chip layout. Design steps included were high-level behavior simulation, library mapping, and standard cell layout generation using a state-of-the-art physical design system. The authors give a brief overview of the CALLAS system, introduce the DSP example, and discuss the synthesis process and the simulations performed
Keywords :
application specific integrated circuits; circuit CAD; circuit analysis computing; digital signal processing chips; software packages; 3400 equivalent gates; ASIC design; CALLAS; DSDL; Siemens; chip layout; digital signal processing; hardware description language; high-level behavior simulation; high-level synthesis system; library mapping; moving-object detection; specification; standard cell layout generation; Algorithm design and analysis; Application specific integrated circuits; Circuit synthesis; Computer aided software engineering; Digital signal processing chips; Hardware design languages; High level synthesis; Libraries; Object detection; Research and development;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2079-X
DOI :
10.1109/ICCD.1990.130185