DocumentCode :
3028490
Title :
A design environment for high performance VLSI signal processing
Author :
Rao, Sailesh ; Hatamian, Mehdi ; Ackland, Bryan
Author_Institution :
AT&T Bell Labs., Holmdel, NJ, USA
fYear :
1990
fDate :
17-19 Sep 1990
Firstpage :
147
Lastpage :
152
Abstract :
An environment for the full-custom design of high-sample-rate digital signal processing (DSP) VLSI circuits is described. An overall design methodology that allows for tradeoffs between algorithms, architecture, and layout is presented. Key CAD tools used in this methodology include architecture mapping, generators, symbolic layout, clock network analysis, and timing simulation. These tools allow designers to move rapidly from specification to layout while keeping a close check on performance parameters such as speed and power dissipation. Two high-speed video chips that were designed using these techniques are described
Keywords :
VLSI; circuit CAD; digital signal processing chips; CAD tools; VLSI circuits; VLSI signal processing; architecture mapping; clock network analysis; full-custom design; generators; high-sample-rate digital signal processing; high-speed video chips; power dissipation; symbolic layout; timing simulation; Circuits; Clocks; Design automation; Design methodology; Digital signal processing; Signal design; Signal processing; Signal processing algorithms; Timing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2079-X
Type :
conf
DOI :
10.1109/ICCD.1990.130186
Filename :
130186
Link To Document :
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