DocumentCode :
3029389
Title :
Low voltage, low power operational amplifier
Author :
Ardalan, Shahab ; Raahemifar, Kaamran ; Yuan, Fei
Author_Institution :
Dept. of Electr. & Comput. Eng., Ryerson Univeristy, Toronto, Ont., Canada
Volume :
2
fYear :
2003
fDate :
14-17 Dec. 2003
Firstpage :
822
Abstract :
A 0.8 V folded cascode operational amplifier was designed in 0.18-μm standard CMOS technology. Emphasis was placed on observing the low voltage design and using current driven bulk (CDB) technique to achieve this goal. The CDB technique was introduced as a method for low voltage design by reducing threshold voltage. This design achieves 140 dB DC gain, 56 MHz 3 dB bandwidth and 65 GHz gain bandwidth, which is the working condition of pipeline ADCs.
Keywords :
CMOS analogue integrated circuits; analogue-digital conversion; integrated circuit design; integrated circuit measurement; low-power electronics; operational amplifiers; pipeline processing; 0.18 micron; 0.8 V; 140 dB; 56 MHz; CDB technique; bandwidth; current driven bulk technique; folded cascode operational amplifier design; gain bandwidth; low voltage design; low voltage low power operational amplifier; pipeline ADC working condition; standard CMOS technology; threshold voltage; CMOS technology; Employee welfare; Equations; Gain; Low voltage; MOS devices; MOSFETs; Operational amplifiers; Pipelines; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference on
Print_ISBN :
0-7803-8163-7
Type :
conf
DOI :
10.1109/ICECS.2003.1301913
Filename :
1301913
Link To Document :
بازگشت