DocumentCode
3029796
Title
Hardware realization of digital signal processing elements using the residue number system.
Author
Jullien, G.A. ; Miller, W.C. ; Soltis, J.J. ; Baraniecka, A. ; Tseng, B.
Author_Institution
University of Windsor, Windsor, Ontario, Canada
Volume
2
fYear
1977
fDate
28246
Firstpage
506
Lastpage
510
Abstract
In the past, hardware realization of digital signal processing elements have been based upon binary arithmetic concepts. Because of the dependence between digits in binary arithmetic operations, the hardware required to construct arithmetic elements is cumbersome. In the residue number system, arithmetic operations can be performed with complete independence between digits and a corresponding reduction in hardware complexity. In fact, using current technology, arithmetic operations can be carried out using arrays of look-up tables placed in high density ROMs. This paper discusses the application of the residue number system to realizing digital signal processing elements using such arrays and advantages and disadvantages over conventional realizations are discussed. Examples are given of recursive filter and FFT butterfly element realization.
Keywords
Digital signal processing; Hardware; Logic design; Packaging; Read only memory; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '77.
Type
conf
DOI
10.1109/ICASSP.1977.1170347
Filename
1170347
Link To Document