VLSI Design and Education Center (VDEC) current status and future plan

Author

Asada, Kunihiro ; Hoh, Koichiro

Author_Institution

VDEC, Tokyo Univ., Japan

fYear

1997

fDate

28-31 Jan 1997

Firstpage

365

Lastpage

369

Abstract

VDEC (VLSI Design and Education Center) is an inter-university center placed in the University of Tokyo, which has a mission to continuously promote and support VLSI education programs in Japanese universities, including the nationals and the privates. After briefly reviewing a history of VDEC, its functions and facilities are summarized, followed by future plans of chip implementation along with a network society

Keywords

VLSI; circuit CAD; electronic engineering education; integrated circuit design; CAD software; Japanese universities; University of Tokyo; VDEC; VLSI Design and Education Center; VLSI education; chip implementation; current status; future plan; history; inter-university center; network society; Collaboration; Continuing education; Councils; Educational programs; Fabrication; Hardware; History; Proposals; Satellites; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 1997. Proceedings of the ASP-DAC '97 Asia and South Pacific

Conference_Location

Chiba

Print_ISBN

0-7803-3662-3

Type

conf

DOI

10.1109/ASPDAC.1997.600210

Filename

600210

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3030660