A GPU/CUDA implementation of the collection-diffusion model to compute SER of large area and complex circuits

Author

Autran, J.L. ; Uznanski, S. ; Martinie, S. ; Roche, P. ; Gasiot, G. ; Munteanu, D.

Author_Institution

Inst. of Mater., Microelectron. & Nanosci. of Provence, UMR, Marseille, France

fYear

2010

fDate

2-4 June 2010

Firstpage

67

Lastpage

70

Abstract

This work reports the CUDA implementation of the collection-diffusion model to compute the soft-error rate (SER) of large area and/or complex circuits on graphics processing units (GPU). We detail the time parallelization introduced in the algorithm to accelerate by one order of magnitude the SER calculation. Code performances are evaluated on a NVIDIA Tesla C1060 GPU card for the calculation of the SER of a 65 nm SRAM circuit subjected to an alpha-particle source irradiation.

Keywords

SRAM chips; circuit simulation; coprocessors; CUDA implementation; GPU implementation; NVIDIA Tesla C1060 GPU card; SER calculation; SRAM circuit; alpha-particle source irradiation; code performances; collection-diffusion model; complex circuits; graphics processing units; soft-error rate; time parallelization; Acceleration; Circuit simulation; Concurrent computing; Electrodes; Equations; Graphics; Parallel processing; Random access memory; Space charge; Yarn; Graphic Processor Unit (GPU); SER simulation; Single-Event Rate (SER); parallel programming;

fLanguage

English

Publisher

ieee

Conference_Titel

IC Design and Technology (ICICDT), 2010 IEEE International Conference on

Conference_Location

Grenoble

Print_ISBN

978-1-4244-5773-1

Type

conf

DOI

10.1109/ICICDT.2010.5510293

Filename

5510293