Title :
Retiming for DSM with area-delay trade-offs and delay constraints
Author :
Tabbara, Abdallah ; Brayton, Robert K. ; Newton, A. Richard
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
The concept of improving the timing behavior of a circuit by relocating registers is called retiming and was first presented by Leiserson and Saxe [1991]. They showed that the problem of determining an equivalent minimum area (total number of registers) circuit is polynomial-time solvable. In this work we show how this approach can be reapplied in the DSM domain when area-delay trade-offs and delay constraints are considered. The main result is that the concavity of the tradeoff function allows for a casting of this DSM problem into a classical minimum area retiming problem whose solution is polynomial time solvable
Keywords :
VLSI; circuit optimisation; delays; integrated circuit design; logic CAD; sequential circuits; timing; DSM retiming; area-delay trade-offs; circuit optimisation; concavity; deep submicron technology; delay constraints; equivalent minimum area; minimum area retiming problem; polynomial-time solvable problem; register relocation; sequential circuits; timing behavior; tradeoff function; Circuit synthesis; Clocks; Delay; Design methodology; Permission; Polynomials; Registers; Sequential circuits; Timing; Wire;
Conference_Titel :
Design Automation Conference, 1999. Proceedings. 36th
Conference_Location :
New Orleans, LA
Print_ISBN :
1-58113-092-9
DOI :
10.1109/DAC.1999.782053
