Size limitation of cross-point memory array and its dependence on data storage pattern and device parameters

Cross-point memory structure suffers from a substantial sneak path leakage and a large degradation of output signal due to the parasitic resistance of the interconnects. In this work, we study the parameter requirements of resistive cross-point memory array under the worst case write and read operation. We focus on the pattern dependence of the memory array and compare the effect of resistance values and resistance ratio on determining the maximum array size. When R_on is beyond 3MΩ and R_off/R_on is greater than 2, the number of cells in the array can reach 10⁶ with a signal swing >50% of the reading voltage. Furthermore, small ratio of resistance states is found to be acceptable as long as the resistance values of both states are large enough.