Title :
IC analyses including extracted inductance models
Author :
Beattie, Michael W. ; Pileggi, Lawrence T.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
IC inductance extraction generally produces either port inductances based on simplified current path assumptions or a complete partial inductance matrix. Combining either of these results with the IC interconnect resistance and capacitance models significantly complicates most IC design and verification methodologies. In this tutorial paper we will review some of the analysis and verification problems associated with on-chip inductance, and present a subset of recent results for partially addressing the challenges which lie ahead
Keywords :
capacitance; inductance; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; IC analyses; IC design; current path assumptions; extracted inductance models; interconnect capacitance; interconnect resistance; on-chip inductance; partial inductance matrix; port inductances; Capacitance; Coupling circuits; Design methodology; Equations; Equivalent circuits; Inductance; Integrated circuit modeling; Mutual coupling; Permission; Semiconductor device modeling;
Conference_Titel :
Design Automation Conference, 1999. Proceedings. 36th
Conference_Location :
New Orleans, LA
Print_ISBN :
1-58113-092-9
DOI :
10.1109/DAC.1999.782224
