LISA-machine description language for cycle-accurate models of programmable DSP architectures

Author

Pees, Stefan ; Hoffmann, Andreas ; Zivojnovic, Vojin ; Meyr, Heinrich

Author_Institution

Aachen Univ. of Technol., Germany

fYear

1999

fDate

1999

Firstpage

933

Lastpage

938

Abstract

This paper presents the machine description language LISA for the generation of bit- and cycle-accurate models of DSP processors. Based on a behavioral operation description, the architectural details and pipeline operations of modern DSP processors can be covered. Beyond the behavioral model, LISA descriptions include other architecture-related information like the instruction set. The information provided by LISA models enables automatic generation of simulators and assemblers which are essential elements of DSP software development environments. In order to proof the applicability of our approach, a realized model of the Texas Instruments TMS320C6201 DSP is presented and derived LISA code examples are given

Keywords

digital signal processing chips; hardware description languages; instruction sets; integrated circuit modelling; parallel architectures; pipeline processing; LISA; Texas Instruments TMS320C6201; architectural details; architecture-related information; behavioral operation description; bit-accurate models; cycle-accurate models; instruction set; machine description language; pipeline operations; programmable DSP architectures; software development environments; Application specific processors; Assembly; Design automation; Digital signal processing; Hardware; Permission; Pipelines; Programming; Signal generators; Signal processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 1999. Proceedings. 36th

Conference_Location

New Orleans, LA

Print_ISBN

1-58113-092-9

Type

conf

DOI

10.1109/DAC.1999.782231

Filename

782231