DocumentCode
3031795
Title
Constrained placement methodology for reducing SER under single-event-induced charge sharing effects
Author
Entrena, Luis ; Lindoso, Almudena ; Millán, Enrique San ; Pagliarini, Samuel ; Kastensmidt, Fernanda
Author_Institution
Electron. Technol. Dept., Univ. Carlos III of Madrid, Leganés, Spain
fYear
2011
fDate
19-23 Sept. 2011
Firstpage
132
Lastpage
137
Abstract
This paper presents a methodology to reduce the impact of double faults in a circuit by constraining the placement of its standard cells. A fault injection emulation platform is used to analyze the single-event-induced charge sharing effect in every pair of nodes. Based on the sensitivity of each pair, guidelines are set in a commercial standard cell placement by using constraints. Results show that by correctly choosing the nodes location, the error rate resulted from double faults can be minimized compared to single fault.
Keywords
electric charge; logic circuits; SER reduction; circuit double fault impact reduction methodology; commercial standard cell placement; constrained placement methodology; fault injection emulation platform; single-event-induced charge sharing effect; Circuit faults; Delay; Error analysis; Estimation; Joints; Layout; Transient analysis; SER; Single-Event-Induced Charge Sharing; fault injection; placement;
fLanguage
English
Publisher
ieee
Conference_Titel
Radiation and Its Effects on Components and Systems (RADECS), 2011 12th European Conference on
Conference_Location
Sevilla
ISSN
0379-6566
Print_ISBN
978-1-4577-0585-4
Type
conf
DOI
10.1109/RADECS.2011.6131298
Filename
6131298
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