Panel: what is the proper system on chip design methodology?

Over the past year two distinct answers have emerged regarding system on chip (SoC) design methodologies. On the one hand, it is posited in the Reuse Methodology Manual, that a logic synthesis-based design methodology can be used effectively to develop system chips. An alternative methodology focuses on integration (or "reference") platforms and the customization of the basic application-specific platform through the addition of selec:ed SW andor HW IP blocks. This panel session will debate the merits of these seemingly incompatible proposed SoC methodologies.