Modular BIST concept for microprocessors

A concept of general usability of a complete self-test for microprocessors is shown by an example. A combination of a firmware-based and a hardware-based self-test architecture is chosen. The hardware approach is useful to test completely embedded macrocells and to support and minimize the self-test firmware. Four embedded macrocells are made self-testable by implementing well-known modular built-in self-test (BIST) methods. The self-test architecture applied is of general applicability. The remaining macrocells, as well as the coordination of the various chip macrocells, are tested by executing an on-chip firmware routine. By using the ordinary processor functions it is possible to considerably reduce the hardware overhead for implementing a complete self-test