Title :
Circuit design for a large area high-performance crossbar switch
Author :
Patyra, Marek ; Maly, Wojciech
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
The methodology for circuit design of large area ICs (LAICs) is discussed. The partitioning and layout strategies for a self-testing, self-reconfigurating LAIC are formulated. It is shown that by proper layout design the circuit sensitivity to the manufacturing defects can be drastically decreased. A LAIC crossbar switch chip, which served as a vehicle for the experimental verification of the described ideas, was designed, fabricated and successfully tested. The built-in current (BIC) sensor was used in the fabricated crossbar IC in order to perform self-testing and self-reconfiguration purposes
Keywords :
VLSI; built-in self test; circuit layout; fault tolerant computing; microprocessor chips; parallel architectures; redundancy; LAIC; built in current sensor; circuit design; circuit sensitivity; crossbar IC; crossbar switch chip; experimental verification; large area ICs; layout design; layout strategies; manufacturing defects; methodology; partitioning; self-reconfigurating; self-testing; Automatic testing; Built-in self-test; Circuit synthesis; Communication networks; Communication switching; Computer architecture; Manufacturing; Switches; Switching circuits; VLIW;
Conference_Titel :
Defect and Fault Tolerance on VLSI Systems, 1991. Proceedings., 1991 International Workshop on
Conference_Location :
Hidden Valley, PA
Print_ISBN :
0-8186-2457-4
DOI :
10.1109/DFTVS.1991.199943
