DocumentCode :
3032500
Title :
Optimal FPGA implementation of GAMLP systems
Author :
Vizitiu, I.C. ; Rîncu, I.C. ; Popescu, F.
Author_Institution :
Commun. & Electron. Syst. Dept., MTA, Bucharest, Romania
fYear :
2010
fDate :
20-22 May 2010
Firstpage :
795
Lastpage :
800
Abstract :
An interesting approach to assure the real-time property of neural automatic target recognition systems is to use an efficient hardware implementation of the neural networks used inside of their classification chains. Consequently, a proper genetic procedure used to optimize both connectivity and distribution of the neural weights of MLP neural networks (GAMLP system) is presented. Finally, having as starting point the previous broached aspects, an optimal FPGA hardware implementation of MLP neural networks is also described.
Keywords :
field programmable gate arrays; genetic algorithms; multilayer perceptrons; GAMLP systems; MLP neural networks; field programmable gate array; genetic procedure; multilayer perceptrons; neural automatic target recognition systems; optimal FPGA implementation; Artificial neural networks; Encoding; Feedforward neural networks; Field programmable gate arrays; Genetics; Network topology; Neural network hardware; Neural networks; Real time systems; Target recognition;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Optimization of Electrical and Electronic Equipment (OPTIM), 2010 12th International Conference on
Conference_Location :
Basov
ISSN :
1842-0133
Print_ISBN :
978-1-4244-7019-8
Type :
conf
DOI :
10.1109/OPTIM.2010.5510377
Filename :
5510377
Link To Document :
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