DocumentCode :
3033021
Title :
Combined hardware selection and pipelining in high performance data-path design
Author :
Note, Stefaan ; Catthoor, Francky ; Goossens, Gert ; De Man, Hugo
Author_Institution :
IMEC Lab., Leuven, Belgium
fYear :
1990
fDate :
17-19 Sep 1990
Firstpage :
328
Lastpage :
331
Abstract :
Pipelining and hardware selection are important optimization tasks in the design of high-performance data paths. At the highest abstraction level, the specification of a data path consists of a number of interconnected abstract building blocks and a constraint on the minimal required clock frequency. An algorithm which optimally selects hardware blocks from a library for implementing these abstract building blocks is presented, and a technique for hierarchical redistribution and insertion of pipeline registers is described. Finally, both optimization tasks are combined. This combination makes the area tradeoff between additional speed-up circuitry and pipeline registers possible
Keywords :
circuit layout CAD; optimisation; abstraction level; hardware selection; high performance data-path design; interconnected abstract building blocks; minimal required clock frequency; optimization; pipeline registers; pipelining; specification; speed-up circuitry; Adders; Clocks; Frequency; Hardware; High level synthesis; Integrated circuit interconnections; Laboratories; Optimization; Pipeline processing; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2079-X
Type :
conf
DOI :
10.1109/ICCD.1990.130241
Filename :
130241
Link To Document :
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