• DocumentCode
    3033736
  • Title

    Reliability and ultra-low temperature bonding of high density large area arrays with Cu/Sn-Cu interconnects for 3D integration

  • Author

    Reed, Jason D. ; Lueck, Matthew ; Gregory, Chris ; Huffman, Charles A. ; Lannon, John M., Jr. ; Temple, Dorota

  • Author_Institution
    Center for Mater. & Electron. Technol., RTI Int., Research Triangle Park, NC, USA
  • fYear
    2010
  • fDate
    6-9 June 2010
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    The results of lifetime testing of Cu/Sn-Cu eutectic bonded dice at 10μm pitch in large area arrays of 325,632 interconnects are shown. The interconnect bonding process (pressure and temperature) required for the formation of low resistance (~100 mΩ), high yielding (99.99% individual bond yield), and reliable interconnects is described. The effects of thermal cycling on electrical yield and resistance are presented. Ultra-low temperature eutectic bonding (at 210°C, below the melting point of tin) is demonstrated to produce high electrical yield, high shear strength and similar intermetallic compound formation to devices bonded at the standard 300°C temperature. Electrical results, shear test results, SEM cross sections and EDS analysis comparisons are presented. The ultralow temperature process may prove useful for integrating IC dice that have low thermal budgets.
  • Keywords
    electric resistance; eutectic alloys; integrated circuit bonding; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; integrated circuit yield; life testing; shear strength; Cu-SnCu; EDS analysis comparisons; SEM cross sections; electrical resistance; electrical yield; eutectic bonded dice; high density large area arrays; integrating IC dice; interconnect bonding process; intermetallic compound formation; lifetime testing; reliable interconnects; shear strength; shear test; size 10 mum; thermal cycling; ultra-low temperature bonding; ultra-low temperature eutectic bonding; Bonding processes; Electric resistance; Electric variables measurement; Etching; Fabrication; Temperature; Testing; Thermal resistance; Tin; Wafer bonding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Interconnect Technology Conference (IITC), 2010 International
  • Conference_Location
    Burlingame, CA
  • Print_ISBN
    978-1-4244-7676-3
  • Type

    conf

  • DOI
    10.1109/IITC.2010.5510457
  • Filename
    5510457