Title :
Pseudo pin assignment for single-layer over-the-cell routing
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
In a CMOS double metal gate-array technology, only the M2 layer is available for over-the-cell routing. A systematic algorithms that intelligently converts global wires into pseudo-pins and assigns them to each row of cells is presented. The final positions of pseudo-pins provide a feasible solution for one-layer routine over the cells and minimize wire densities in the adjacent two-layer routing channels
Keywords :
CMOS integrated circuits; circuit layout CAD; CMOS double metal gate-array technology; M2 layer; one-layer routine; over-the-cell routing; CMOS technology; Mesh generation; Paper technology; Pins; Routing; Wires; Wiring;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2079-X
DOI :
10.1109/ICCD.1990.130245