Title :
Phase edge lithography for sub 0.1 /spl mu/m electrical channel length in a 200 mm full CMOS process
Author :
Agnello, P. ; Newman, T. ; Crabbe, E. ; Subbanna, S. ; Ganin, E. ; Liebmann, L. ; Comfort, J. ; Sunderland, D.
Author_Institution :
IBM Corp., Hopewell Junction, NY, USA
Abstract :
In this work a deep-UV stepper is used in conjunction with a phase edge mask to define sub 0.1 /spl mu/m electrical channel length gates in a 200 mm integrated CMOS process. Conventional binary intensity mask deep-UV and mid-UV lithography are other used for other levels. We demonstrate excellent channel length control with the phase edge technique, at channel lengths here-to-fore only achievable by e-beam or X-ray lithography.
Keywords :
CMOS integrated circuits; integrated circuit technology; phase shifting masks; photolithography; 0.1 micron; 200 mm; CMOS process; deep-UV lithography; electrical channel length; phase edge mask; stepper; CMOS logic circuits; CMOS process; CMOS technology; Etching; Glass; Microelectronics; Reproducibility of results; Research and development; Resists; X-ray lithography;
Conference_Titel :
VLSI Technology, 1995. Digest of Technical Papers. 1995 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
0-7803-2602-4
DOI :
10.1109/VLSIT.1995.520867
