DocumentCode :
3034397
Title :
A high data rate, low power all-digital correlation circuit design
Author :
Current, K. ; Mow, Douglas A. ; Youssef-Digaleh, Shnider
Author_Institution :
University of California, Davis, CA
Volume :
4
fYear :
1979
fDate :
28946
Firstpage :
859
Lastpage :
862
Abstract :
Correlation techniques are widely used in analog and digital signal processing; e.g. in optiman receiver design. In this paper, a new digital output correlator circuit design is proposed. The correlation results are presented as a binary count of the number of bits in agreement between 31-bit reference and input sequences. Correlation results could be presented at data rates up to about 50MHz. The proposed new circuit could be implemented in a high speed bipolar transistor technology as a monolithic large-scale-integrated circuit with a power dissipation of about .5 watts. A novel pipelined 31-bit digital summing circuit will be presented that employs new multivalued, multithresholded latching and counting circuits in the formation of its binary-coded output. Comparisons with an all-binary digital correlator circuit are made.
Keywords :
Circuit synthesis; Correlators; Digital signal processing; Large scale integration; Logic circuits; Logic design; Logic devices; Multivalued logic; Signal design; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '79.
Type :
conf
DOI :
10.1109/ICASSP.1979.1170609
Filename :
1170609
Link To Document :
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