Title :
An efficient AVF estimation technique using circuit partitioning
Author :
Chetia, Jugantor ; Sierawski, Brian D. ; Sternberg, Andrew L. ; Adeleke, Adeola A. ; Bhuva, Bharat L. ; Massengill, Lloyd W.
Author_Institution :
Vanderbilt Univ., Nashville, TN, USA
Abstract :
This paper investigates a novel modular approach to efficiently estimate the Architectural Vulnerability Factor (AVF) of large designs by employing circuit partitioning and error propagation techniques. Modular approach is a hybrid of statistical fault injection technique and analysis based technique. Results show that for the same level of accuracy, our modular approach arrives at the AVF within 6% of that estimated by the traditional full circuit statistical fault injection, with a speedup of 2X in terms of CPU time.
Keywords :
digital circuits; failure analysis; radiation hardening (electronics); statistical analysis; architectural vulnerability factor; circuit partitioning technique; efficient-AVF estimation technique; error propagation technique; modular approach; statistical fault injection technique; Central Processing Unit; Circuit faults; Computational modeling; Erbium; Integrated circuit modeling; Probabilistic logic; Registers;
Conference_Titel :
Radiation and Its Effects on Components and Systems (RADECS), 2011 12th European Conference on
Conference_Location :
Sevilla
Print_ISBN :
978-1-4577-0585-4
DOI :
10.1109/RADECS.2011.6131427