Architecture of a multiprocessor-based high speed communications processor

Author

Sreetharan, M. ; Stubblefield, R. ; Subramaniam, S.

fYear

1988

fDate

27-31 Mar 1988

Firstpage

1072

Lastpage

1081

Abstract

The authors detail the system architecture of a communications processor that uses an existing distributed message switching data communications network as the transport medium for the Arinc Transaction Terminal Service (ATTS) application. Salient features of a powerful communications controller board are described and the organization of the software is outlined to show how the hardware/operating system dependence is minimized to enhance software portability

Keywords

computer architecture; data communication equipment; data communication systems; message switching; multiprocessing systems; software portability; telecommunications computing; Arinc Transaction Terminal Service; communications controller board; distributed message switching data communications network; multiprocessor-based high speed communications processor; software portability; system architecture; transport medium; Application software; Availability; Communication switching; Communication system software; Computer architecture; Computer networks; Data communication; Packet switching; Radio spectrum management; Routing protocols;

fLanguage

English

Publisher

ieee

Conference_Titel

INFOCOM '88. Networks: Evolution or Revolution, Proceedings. Seventh Annual Joint Conference of the IEEE Computer and Communcations Societies, IEEE

Conference_Location

New Orleans, LA

Print_ISBN

0-8186-0833-1

Type

conf

DOI

10.1109/INFCOM.1988.13025

Filename

13025