DocumentCode :
3035249
Title :
VLSI implementations of electronic neural networks: an example in character recognition
Author :
Jackel, L.D. ; Boser, B. ; Graf, H.P. ; Denker, J.S. ; Cun, Y.L. ; Henderson, D. ; Matan, O. ; Howard, R.E. ; Baird, H.S.
Author_Institution :
AT&T Bell Lab., Holmdel, NJ, USA
fYear :
1990
fDate :
4-7 Nov 1990
Firstpage :
320
Lastpage :
322
Abstract :
A large class of applications where theoretical considerations that promote high-accuracy classification result in constrained network architectures have been identified through a series of experiments in pattern recognition using neural net algorithms. These constrained nets can map onto appropriately designed hardware. The concepts learned from the pattern recognition experiments are discussed, and it is shown how they can be applied to chip design. A neural net chip for machine vision is described. The chip combines analog and digital processing and is reconfigurable
Keywords :
VLSI; computer vision; neural nets; pattern recognition; VLSI; character recognition; constrained network architectures; electronic neural networks; machine vision; neural net chip; Character recognition; Chip scale packaging; Circuit testing; Digital signal processing chips; Hardware; Intelligent networks; Neural networks; Neurons; Optical character recognition software; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Systems, Man and Cybernetics, 1990. Conference Proceedings., IEEE International Conference on
Conference_Location :
Los Angeles, CA
Print_ISBN :
0-87942-597-0
Type :
conf
DOI :
10.1109/ICSMC.1990.142119
Filename :
142119
Link To Document :
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