DocumentCode :
3035292
Title :
Design and analysis of a synchronous dram memory module
Author :
Ley, Grant ; Phipps, Daniel
Author_Institution :
Texas Instruments
fYear :
1996
fDate :
1996
Firstpage :
72
Lastpage :
78
Keywords :
Clocks; Connectors; Feedback loop; Phase locked loops; Propagation delay; Registers; SDRAM; Signal detection; Sockets; Superluminescent diodes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Memory Technology, Design and Testing, 1996. Records of the 1996 IEEE International Workshop on
ISSN :
1087-4852
Print_ISBN :
0-8186-7466-0
Type :
conf
DOI :
10.1109/MTDT.1996.782495
Filename :
782495
Link To Document :
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