DocumentCode
3035381
Title
A true testprocessor-per-pin algorithmic pattern generator
Author
Hilliges, Klaus-Dieter ; Sundermann, Jens
Author_Institution
Hewlett Packard GmbH
fYear
1996
fDate
1996
Firstpage
103
Lastpage
109
Keywords
Bandwidth; Cost function; Integrated circuit testing; Logic testing; Production; Random access memory; System buses; System testing; Test pattern generators; Time to market;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Technology, Design and Testing, 1996. Records of the 1996 IEEE International Workshop on
ISSN
1087-4852
Print_ISBN
0-8186-7466-0
Type
conf
DOI
10.1109/MTDT.1996.782500
Filename
782500
Link To Document