A classification and comparative overview of state-of-the-art analog linearization techniques for integrated CMOS power amplifiers

A classification and comparison of state-of-the-art analog PA linearization techniques was conducted to identify which are suitable for handsets with digitally modulated signals (eg.WCDMA). Device and circuit level linearization methods are insufficient as standalone techniques although they are the least complex. However, their incorporation within system level adaptive predistorters shall alleviate the complexity. Such a combination of hybrid (device-circuit-system) level linearization methods would provide the solution to trade-off complexity and amount of linearity improvement. A hybrid-level linearization technique is hereby proposed to benefit from the advantages of device and circuit level linearization with low extra power consumption while chip area is preserved for terminal applications.