LPC voice digitizer with background noise suppression

This paper describes a unique design that attacks two problem areas of LPC: noise suppression input level control and real time simulation/ test. The noise level design uses algorithms to digitally process speech data before input to the LPC algorithm processor. The LPC processor described in the paper is based on a microprocessor design conceived specifically for speech. The noise suppression and level control algorithms are performed in a separate front end processor that detects noise patterns and deletes them from the normal voice input. The operational hardware system is shown to the block diagram level as well as the particular simulation/test scheme. Test results are also described in this paper.