Title :
Ferroelectric negative capacitance MOSFET: Capacitance tuning & antiferroelectric operation
Author :
Khan, Asif I. ; Yeung, Chun W. ; Hu, Chenming ; Salahuddin, Sayeef
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA
Abstract :
A design methodology of ferroelectric (FE) negative capacitance FETs (NCFETs) based on the concept of capacitance matching is presented. A new mode of NCFET operation, called the “antiferroelectric mode” is proposed, which, besides achieving sub-60mV/dec subthreshold swing, can significantly boost the on-current in exchange for a nominal hysteresis. Design considerations for different device parameters (FE thickness, EOT, source/drain overlap & gate length) are explored. It is suggested that relative improvement in device performance due to FE negative capacitance becomes more significant in very short channel length devices because of the increased drain-to-channel coupling.
Keywords :
MOSFET; antiferroelectricity; capacitance; dielectric hysteresis; ferroelectricity; tuning; FE negative capacitance; MOSFET; NCFET operation; antiferroelectric operation; capacitance matching; capacitance tuning; device parameter; drain-to-channel coupling; ferroelectric negative capacitance; nominal hysteresis; subthreshold swing; very short channel length device; CMOS integrated circuits; Capacitance; Hysteresis; Iron; Logic gates; MOSFET circuits; Performance evaluation;
Conference_Titel :
Electron Devices Meeting (IEDM), 2011 IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
978-1-4577-0506-9
Electronic_ISBN :
0163-1918
DOI :
10.1109/IEDM.2011.6131532
