Title :
Hardware modeling and verification of an ATM ring MAC protocol
Author :
Peng, Hong ; Tahar, Sofiène
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Abstract :
In this paper, we describe the modeling and verification of the register transfer level (RTL) design of an ATM ring (ATMR) media access control (MAC) protocol using the VIS hardware verification model checking tool. We succeeded in verifying both a synchronous and an asynchronous design alternative of this MAC. Throughout the verification, we report the performance of hardware protocol verification in model checking, and discuss some modeling techniques we adopted in the verification
Keywords :
access protocols; asynchronous transfer mode; circuit analysis computing; integrated circuit design; integrated circuit modelling; ATM ring MAC protocol; ATM ring media access control protocol; RTL design; VIS hardware verification model checking tool; asynchronous design; hardware modeling; hardware protocol verification; model checking; modeling; modeling techniques; register transfer level design; synchronous design; verification; Asynchronous transfer mode; Delay; Design engineering; Electronic mail; Hardware; Media Access Protocol; Registers; Software tools; State-space methods; Very large scale integration;
Conference_Titel :
Microelectronics, 2000. ICM 2000. Proceedings of the 12th International Conference on
Conference_Location :
Tehran
Print_ISBN :
964-360-057-2
DOI :
10.1109/ICM.2000.916406
