DocumentCode :
3037144
Title :
Signal probability calculation in Boolean functions using graph oriented realization
Author :
Ghaznavi-Ghoushchi, M.B. ; Nabavi, Abdolreza
Author_Institution :
Dept. of Electr. Eng., Tarbiat Modares Univ., Tehran, Iran
fYear :
2000
fDate :
2000
Firstpage :
29
Lastpage :
32
Abstract :
This paper presents a method for signal probability calculation in digital circuits, using graph-oriented realization (GOR) (Ghaznavi-Ghoushchi, 1998). It starts from BDD cutset graphs, and computes the probability by incorporating the “high”-terminated cutsets. The correlations between cutsets are accounted for. Theories and rules necessary for generalization of the method are given, and the method can be readily incorporated in CAD tools for digital design
Keywords :
Boolean functions; binary decision diagrams; circuit CAD; circuit analysis computing; digital circuits; graph theory; logic CAD; probability; BDD cutset graphs; Boolean functions; CAD tools; GOR; cutset correlations; digital circuits; digital design; graph oriented realization; high-terminated cutsets; method generalization; signal probability; signal probability calculation; Binary decision diagrams; Boolean functions; Character generation; Data structures; Design automation; Digital circuits; Power dissipation; Power measurement; Probability; Software libraries;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 2000. ICM 2000. Proceedings of the 12th International Conference on
Conference_Location :
Tehran
Print_ISBN :
964-360-057-2
Type :
conf
DOI :
10.1109/ICM.2000.916408
Filename :
916408
Link To Document :
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