Title :
Influence of charge trapping on failure detection and its distributions for nFET high-κ stacks
Author :
Wu, Ernest Y. ; Ioannou, Dimitris P. ; LaRow, Charles B.
Author_Institution :
IBM Semicond. Res. & Technol. Center, Essex Junction, VT, USA
Abstract :
We report that charge trapping has a strong impact on failure detection, yielding many anomalous non-Poisson area effects in nFETs high-κ stacks. Time-to-failure (TFAIL) distributions and voltage accelerations are found to strongly depend on stress waveforms such as interrupted DC stress and uninterrupted DC stress as well as unipolar and bipolar AC stress. Various correction methodologies such as SILC removal and voltage correction are considered to account for these adverse effects which are not present in SiO2 films.
Keywords :
failure analysis; field effect transistors; high-k dielectric thin films; silicon compounds; stress analysis; SILC removal; SiO2; SiO2 film; anomalous nonPoisson area effect; bipolar AC stress; charge trapping; correction methodology; failure detection; interrupted DC stress; nFET high-k stack; stress waveform; time-to-failure distribution; uninterrupted DC stress; unipolar AC stress; voltage acceleration; voltage correction; Acceleration; Charge carrier processes; Current measurement; Dielectrics; Stress; Threshold voltage; Transient analysis;
Conference_Titel :
Electron Devices Meeting (IEDM), 2011 IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
978-1-4577-0506-9
Electronic_ISBN :
0163-1918
DOI :
10.1109/IEDM.2011.6131577
