DocumentCode
3037968
Title
Independent Front-end and Back-end Dynamic Voltage Scaling for a GALS Microarchitecture
Author
Magklis, Grigorios ; Chaparro, Pedro ; González, José ; González, Antonio
Author_Institution
Intel Barcelona Res. Center
fYear
2006
fDate
4-6 Oct. 2006
Firstpage
49
Lastpage
54
Abstract
In recent years, globally asynchronous locally synchronous (GALS) designs and dynamic voltage scaling (DVS) have emerged as some of the most popular approaches to address the ever increasing microprocessor energy consumption. In this work, we propose two on-line algorithms for adjusting dynamically, and independently, the voltage and frequency of the front-end and back-end domains of a novel two-domain microprocessor. We evaluate our mechanisms for both internal and external voltage regulators, and we present optimal dynamic voltage scaling results for the proposed microarchitecture. Our schemes achieve average improvement of 12% of the energy-delay metric, when using internal voltage regulators
Keywords
asynchronous circuits; logic design; microprocessor chips; voltage regulators; GALS microarchitecture; dynamic voltage scaling; globally asynchronous locally synchronous designs; microprocessor energy consumption; voltage regulators; Clocks; Dynamic voltage scaling; Energy efficiency; Iron; Logic; Microarchitecture; Microprocessors; Out of order; Regulators; Voltage control; Algorithms; DVS; Design; GALS; MCD; energy efficiency; microarchitecture;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 2006. ISLPED'06. Proceedings of the 2006 International Symposium on
Conference_Location
Tegernsee
Print_ISBN
1-59593-462-6
Type
conf
DOI
10.1109/LPE.2006.4271806
Filename
4271806
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