• DocumentCode
    3038010
  • Title

    A modified inverted-staggered TFT structure suitable for a fully wet etch fabrication process for high performance low and high voltage a-Si:H TFTs

  • Author

    Miri, Ami Masoud ; Mohajerzadeh, Shamsoddin ; Nathan, Arokia

  • Author_Institution
    Dept. of Electr. Eng., Tehran Univ., Iran
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    241
  • Lastpage
    246
  • Abstract
    We designed an inverted staggered structure suitable for a completely wet etching process which also allows integration of many other a-Si:H based devices and circuits, using the same TFT fabrication process, with no need for any extra step. This structure lends itself to a fully wet etch fabrication technology which is simple, reproducible, completely compatible with positive photo-resist lithography techniques, and suitable for mass production of amorphous silicon TFT based circuits. Our wet etch method, unlike conventional dry etch methods, does not cause bulk and surface damage to the devices. Using this process, we fabricated high performance TFTs with a typical effective mobility of 1.2 cm2/V.s, threshold voltage as low as 1 V and on/off current ratio of 107. With the same process and utilizing our novel soft contact TFT (SCTFT), we managed to fabricate high performance, high voltage TFTs which extend the working voltage range of our TFTs to above 100 V. Our high voltage SCTFTs, unlike conventional high voltage TFTs (HVTFTs), do not suffer from a low on-current Vx shift and a huge curvature in its output characteristic. The soft contact structure also improves the yield and reliability
  • Keywords
    amorphous semiconductors; carrier mobility; electric current; electrical contacts; elemental semiconductors; etching; hydrogen; photolithography; semiconductor device reliability; silicon; thin film transistors; 1 V; 100 V; HVTFTs; SCTFT; Si:H; TFT fabrication process; TFTs; a-Si:H based circuits; a-Si:H based devices; amorphous silicon TFT based circuits; bulk damage; device yield; dry etch methods; effective mobility; high voltage SCTFTs; high voltage a-Si:H TFTs; inverted staggered structure; low on-current voltage shift; low voltage a-Si:H TFTs; mass production; modified inverted-staggered TFT structure; on/off current ratio; output characteristic curvature; positive photo-resist lithography techniques; reliability; soft contact TFT; soft contact structure; surface damage; threshold voltage; wet etch fabrication process; wet etch fabrication technology; wet etch method; wet etching process; working voltage range; Amorphous silicon; Crystallization; Dry etching; Electrodes; Fabrication; Insulation; Plasma applications; Plasma devices; Thin film transistors; Wet etching;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics, 2000. ICM 2000. Proceedings of the 12th International Conference on
  • Conference_Location
    Tehran
  • Print_ISBN
    964-360-057-2
  • Type

    conf

  • DOI
    10.1109/ICM.2000.916453
  • Filename
    916453