DocumentCode :
3038260
Title :
Utilizing Reverse Short Channel Effect for Optimal Subthreshold Circuit Design
Author :
Kim, Tae-Hyoung ; Eom, Hanyong ; Keane, John ; Kim, Chris
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN
fYear :
2006
fDate :
4-6 Oct. 2006
Firstpage :
127
Lastpage :
130
Abstract :
The impact of the reverse short channel effect (RSCE) on device current is stronger in the subthreshold region due to the reduced drain-induced-barrier-lowering (DIBL) and the exponential dependency of current on threshold voltage. This paper describes a device size optimization method for subthreshold circuits utilizing RSCE to achieve high drive current, low device capacitance, less sensitivity to random dopant fluctuations, and better subthreshold swing. Simulation results using ISCAS benchmark circuits show that the critical path delay and power consumption can be improved by up to 10.4% and 34.4%, respectively
Keywords :
circuit optimisation; integrated circuit design; critical path delay; device current; device size optimization; drain-induced-barrier-lowering; reverse short channel effect; subthreshold circuit design; subthreshold circuits; subthreshold operation; threshold voltage; CMOS technology; Capacitance; Circuit simulation; Circuit synthesis; Energy consumption; Fluctuations; Logic devices; Optimization methods; Permission; Threshold voltage; Design; Optimization; PVT variations; Performance; Reverse short channel effect; Subthreshold Circuits; Subthreshold operation; digital circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Low Power Electronics and Design, 2006. ISLPED'06. Proceedings of the 2006 International Symposium on
Conference_Location :
Tegernsee
Print_ISBN :
1-59593-462-6
Type :
conf
DOI :
10.1109/LPE.2006.4271820
Filename :
4271820
Link To Document :
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