Title :
A 12 b 20 MS/s ripple-through ADC
Author :
Jewett, R. ; Corcoran, J. ; Steinbach, G.
Author_Institution :
Hewlett-Packard Lab., Palo Alto, CA, USA
Abstract :
The characteristics of a 12 b 20 MS/s ripple through analog-to-digital converter (ADC) are described. The one-bit-per-stage ripple-through architecture used in this 12-b ADC requires only 21 comparators and one track and hold for 12-b resolution, resulting in a smaller die (18 mm/sup 2/) and 7 to 14 dB better signal to noise and distortion ratio (SNDR) than previous 10-b converters.<>
Keywords :
analogue-digital conversion; monolithic integrated circuits; 12 bit resolution; A/D convertor; SNDR; comparators; ripple-through ADC; track/hold circuit; BiCMOS integrated circuits; Calibration; Clocks; Driver circuits; Frequency; Logic; Switches; Temperature; Testing; Wideband;
Conference_Titel :
Solid-State Circuits Conference, 1992. Digest of Technical Papers. 39th ISSCC, 1992 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-0573-6
DOI :
10.1109/ISSCC.1992.200397
