DocumentCode
3038328
Title
On Reducing Circuit Malfunctions Caused by Soft Errors
Author
Polian, Ilia ; Reddy, Sudhakar M. ; Pomeranz, Irith ; Tang, Xun ; Becker, Bernd
Author_Institution
Inst. for Comput. Sci., Albert-Ludwigs- Univ., Freiburg
fYear
2008
fDate
1-3 Oct. 2008
Firstpage
245
Lastpage
253
Abstract
Soft errors due to radiation are expected to increase in nanoelectronic circuits. Methods to reduce system failures due to soft errors include use of redundancy and making circuit elements robust such that soft errors do not upset signal values. Recent works have noted that electronic circuits have partial intrinsic immunity to soft errors since single event upsets on a large percentage of signal lines do not cause errors on circuit outputs. Using ISCAS-89 benchmark circuits we present experimental evidence that the partial immunity to single event upsets is in most cases due to redundancy in the circuits and thus immunity to soft errors may not be available in irredundant circuits. Thus goals on immunity to soft errors may not be achievable in highly optimized circuits without adding circuit redundancy and/or relaxing the requirements on system failures due to soft errors.
Keywords
nanoelectronics; radiation hardening (electronics); redundancy; ISCAS-89 benchmark circuits; circuit elements; nanoelectronic circuits; partial intrinsic immunity; reducing circuit malfunctions; redundancy; soft errors; Cities and towns; Clocks; Computer errors; Computer science; Fault tolerant systems; Flip-flops; Logic circuits; Redundancy; Single event upset; Very large scale integration; Soft errors; circuit hardening;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance of VLSI Systems, 2008. DFTVS '08. IEEE International Symposium on
Conference_Location
Boston, MA
ISSN
1550-5774
Print_ISBN
978-0-7695-3365-0
Type
conf
DOI
10.1109/DFT.2008.20
Filename
4641179
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